bram timing

I went ahead and played with Isim because I wanted to find out how long it would take for a value to be written to the bram data.

So I opened the ip generator and selected block ram.

16 wide and 16 tall.

I hooked up the DCM and tested it to see what would happen.

oh yeah, the DCM needs some special configurations.  Instead of going blah blah, I'll just copy and past it right here

-------

   DCM_CLKGEN_inst : DCM_CLKGEN
   generic map (
      CLKFXDV_DIVIDE => 2,       -- CLKFXDV divide value (2, 4, 8, 16, 32)
      CLKFX_DIVIDE => 1,         -- Divide value - D - (1-256)
      CLKFX_MD_MAX => 0.0,       -- Specify maximum M/D ratio for timing anlysis
      CLKFX_MULTIPLY => 256,       -- Multiply value - M - (2-256)
      CLKIN_PERIOD => 0.0,       -- Input clock period specified in nS
      SPREAD_SPECTRUM => "NONE", -- Spread Spectrum mode "NONE", "CENTER_LOW_SPREAD", "CENTER_HIGH_SPREAD",
                                 -- "VIDEO_LINK_M0", "VIDEO_LINK_M1" or "VIDEO_LINK_M2"
      STARTUP_WAIT => FALSE      -- Delay config DONE until DCM_CLKGEN LOCKED (TRUE/FALSE)
   )
   port map (
      CLKFX => CLKFX,         -- 1-bit output: Generated clock output
      CLKFX180 => CLKFX180,   -- 1-bit output: Generated clock output 180 degree out of phase from CLKFX.
      CLKFXDV => CLKFXDV,     -- 1-bit output: Divided clock output
      LOCKED => open,       -- 1-bit output: Locked output
      PROGDONE => open,   -- 1-bit output: Active high output to indicate the successful re-programming
      STATUS => open,       -- 2-bit output: DCM_CLKGEN status
   
CLKIN => clock,         -- 1-bit input: Input clock
      FREEZEDCM => '0', -- 1-bit input: Prevents frequency adjustments to input clock
      PROGCLK => open,     -- 1-bit input: Clock input for M/D reconfiguration
      PROGDATA => open,   -- 1-bit input: Serial data input for M/D reconfiguration
      PROGEN => open,       -- 1-bit input: Active high program enable
      RST => '0'              -- 1-bit input: Reset input pin
   );

-------

ok, to make a long story short, the multiplied clock signal shall be called "clkfx"
The not clock is called "clkfx180".

I write using the rising edge of clkfx180.  I read using the rising edge of "clkfx"
This is mainly for the VGA screen.  The timer needs to be in synce with read.

So anyways, how long DOES it take to write to the memory?
well, when I ramp the multiplier to 256, it takes 0.000144 us.
The down side was that clkfx must tick 5 times.

mult | time(ns) | clkfx ticks
256 | 0.144  | 5
128 | 0.183 | 3
64  | 0.183 | 2
32  | 0.339 | 2
16  | 0.724  |2

it seams like 64 multiplier seems to be the best choice.  I just have to make sure that I hold the data value and the write enable needs to be held for 2 ticks.

lets say it takes 0.2 ns to write.  How long will it take to clear the pixel mem?
The pixel mem has 320*240 = 76800 addresses.

0.2ns*76800 = 15360ns

--
perhaps I want the print to clear ratio to be 999:1

0.0153 sec or  15 ms will be spend printing .

this would have ~ 60hz period of writing and clearning.

Hopefully with this config, I would be able to get rid of the flicker the plagues my project.

-----
The duty is low, it shall work for the duration of 15360ns.
the duty will be high for the durations of 15 ms.