Sunday, August 12, 2012

Latch verse flip-flop

It appears that in a latch, the clock is being used as an enable line which dictates WHEN D should set Q.
ie
Q <= D when enable = '1' else Q;  --latch

It appears that a flip flop, uses the rising edge of the clock to write.  D will set Q when it sees a rising edge.

ie
Q <= D when clock = '1' and clock'event else Q;  --flip-flop

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The below is Reblogged from here



Many experienced engineers are clueless about the differences between a "Latch" and a "Flip Flop", and i have seen people using the terms synonymously. I feel that the right use of terminology is very critical in conveying the message more clearly.

I m sure the timing diagrams below is the best way of explanation.









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